I am typing this up off-line, in between all the day-to-day hassles of trying to run a business.
Let's assume that some of you guys d/l'ed the phase noise-jitter s/w.
I will take an 11 MHz clock, with the following phase noise number, which are probably pretty close to what you would find in a typical CD player.
10 Hz = -100 dBc, 100 Hz = -130 dBc, 1 kHz = -135 dBc, the rest = -140 dBc.
So, we get around 1 pSec. Not bad. Easy to believe numbers.
Many years ago, I made some measurements on what happens if you stick the clock into the digital filter chip, and distribute the clock from it. (About the same thing as implementing it internal to that chip.) I am doing this form memory, but I recall the phase noise increased (depending on the actual unit) somewhere in the range of 13- 20 dB.
OK...........plug in some new numbers......off the top of my head:
10 Hz = 90 dBc, 100 Hz = -115 dBc, 1 kHz = -100 dBc, and -120 dBc above that point.
So, we have gone from around 1 pSec to around 5 pSec. What this example can not show is all the 60 Hz (and related harmonic) sidebands, plus some amount of data-correlated noise. Still, it gives you an idea of how much improvement you might typically find by sticking a better clock in your CD player.
Translation: Some. Enough to justify the cost? Depends on your point of view. For me, it costs virtually nothing, so I do. If it costs $300-400 to have someone do it for you, well, you have to decide for yourself.
In any case, jitter should not be a major problem in a CD player. Worry about it only if you don't have other areas to address.
But, when we go to SPDIF, things change a lot. Typical RX chip data sheet says jitter is (whether you believe them or not......well, let's see if we should) around 200 pSec, for the popular ones.
OK, again from memory, but I found that the phase noise was at least 40 dB worse than the clock it was derived from. Maybe more. I have seen 60 dB. But let's stick with around 40 dB degradation.
New numbers to plug in:
100 Hz = -55 dBc, 100 Hz = -85 dBc, 1 kHz = -95 dBc, -100 dBc above that.
That gives us less than 180 pSec.
OK, I pulled those data points out of my head, based on my experience. Can we juggle them some to get down to 100 pSec range? Let's see what that takes.
Hey, only takes 5 dB reduction to get down to 100 pSec.
Of course, this only shows jitter from random noise sources. In real life, the jitter in SPDIF has a strong degree of data correlation. So, it is more audible. You simply can not ignore that fact.
Now, Ethan maintains that anything under 2 nSec is not audible. How much phase noise would you need then? Well, just raise the close-in noise to around -30 dBC. Trust me, that level is really high. Like I said, you can't make a clock with that much jitter unless you really try hard.
So, if Ethan is right, then the clock makes absolutely no difference in any digital audio. Only one of us can be right. So which one is it?
Well, I know that 99% of the folks here believe clock jitter is a problem. So how can Ethan be right?
There is a way! And I will show you.
(This is called comparing apples to apples, and not bananas.)
Let's plug in some new phase noise numbers:
10 Hz = -90 dBc, 100 Hz = -115 dBc, 1 kHz and up is -120 dBc.
Now we set the carrier frequency to 44 kHz. Which is..................drum roll.............the sampling frequency.........and the jitter is................more drum roll........
<2 nSec. Hey, those phase numbers don't like much unlike what I would call a modest oscillator.
So, to a guy like Ethan who lives and works in 44 kHz world, and the guys who build the 11.2896 MHz clocks, we aren't talking the same language. I kinda sorta suspected this all along. Now I have proof.
In a sense, we are both right. I know from my years of designing oscillators, clocks VCOs and PLLs how low this stuff has to be to inaudible. Not all that far from someone who isn't an engineer, and speaks a different language believes from his listening experience.
So, now I guess we can quibble over the last few picoseconds at clock frequency, not sampling frequency.
(Anyone remember what I said about needing to be down to single digit pSec range?)
Pat