I am looking around to find some low noise linear power suply designs with 1-2 amp current rating. Does anyone know any DIY circuits.It is for using with digital line level devices.
http://tangentsoft.net/elec/misc/diy-series-linregs.pdf
Will one of these will work for a 5V,1.5AMP circuit?
Not sure what you mean by "low noise", for a linear power supply. And noise should be less important for a digital device.
I see that your link has some of the advanced discrete regulator circuit schematics. I suspect that any of those would be overkill, for your application. (But of course overkill doesn't hurt, except for your time and money.)
With most audio systems, but maybe especially with digital devices, assuming you are building the device to be powered, and even if you use a super-regulator type of circuit, the most (and maybe only) important thing is to ensure that current is available, at the power pins of the active devices, exactly when and as they try to allow it to flow.
That is usually best done with a combination of properly-configured decoupling capacitor networks at each point of load, local bulk decoupling capacitors, and power supply reservoir capacitors. Alternatively, with the right regulator or super-regulator, some of those capacitors can be omitted, if the regulator output is very close to the point of load.
But if you don't get the decoupling capacitors correctly configured (i.e. their sizes, capacitances, and distances from each point of load (chip power pins)), then no super-regulator nor any other power supply can fix that problem (unless, perhaps, you connect its output capacitance within a millimeter of the chip's power pin).
For digital devices, at the chip or transistor level, it is extremely important to have a physically-small decoupling capacitor connected extremely close to each power pin, with its other end connected by the shortest-possible path to the load's or chip's ground. Otherwise, the fast-rising current that's required would have to attempt to come through the inductances of the longer power and ground rails. Two bad things then occur: The correct current amplitude doesn't get there soon-enough, and, a voltage spike is induced across the distributed inductances of the power and ground rail conductors. Even with low-amplitude currents and small inductances, the voltage spikes can be large, since their amplitude depends only on the time rate-of-change of the current, times the inductance, as in v = L di/dt .
It's best to not guess at the minimum capacitance needed, or how long the connections can be, or even how large the capacitor's lead spacing is allowed to be. Those are all easy-enough to calculate. Also, in order to have low-enough inductance (which is mostly determined by lead spacing and connection lengths), it is often necessary to parallel more than one capacitor. If that is needed, it will become obvious from the calculations.
If you don't want to do any calculations, you can see if the chip's datasheet recommends any specific decoupling capacitance configuration, or, you can try the "standard" ones, such as a 0.01 uF or 0.1 uF X7R ceramic, in parallel with a 10 uF aluminum electrolytic.
If you are really serious about building the best-performing system, you will need to design a multi-layer printed circuit board, with at least four layers, with good power and ground planes, with the correct between-plane spacing. If you are DIY'ing at home and can only make a 2-sided PCB, then at least use a ground plane.
I would post the calculation method for decoupling capacitors' minimum sizes and maximum connection lengths, here, now, but it's way past my bedtime, and, it has occurred to me that maybe no one is interested-enough for me to be able to justify the effort.
But I will check back and if there is any interest, then I will provide what I think I know. Or, look at Henry Ott's excellent book, "Electromagnetic Compatibility Engineering", or websites by people like Henry Ott, Howard Johnson, Bruce Achambeault, Eric Bogatin, and others.
Here is a link to a paper that is pretty good, and has the right equations, but might be overkill for most DIYers:
http://www.si-list.net/files/published/sun/cpmt_1999.pdfThat paper was mentioned here:
http://www.sigcon.com/Pubs/news/1_6.htmAnd here is a real treasure trove of design information (except they call them bypass caps instead of decoupling caps):
http://www.sigcon.com/Pubs/pubsKeyword.htm#bypass capacitors