Hi Bob, James,
The short answer -- on the mac, set the word length to 24 bits, and the sample rate to match the source material. On the BDA-1, have upsampling on. You are correct in assuming that there is no difference if the source sample rate matches the output sample rate -- it's only a question of where the extra 0s come from.
Why?
Toslink/spdif has room for 24 bits/sample -- when sending 16 or 20 bits, the remaining low order bits are 0. The SRC4392 chip in the BDA-1 takes those 24 input bits, and uses 28 bits (fixed point, not floating point) internally for its math, and produces 24 bits of output/sample. The extra guard bits in the SRC chip ensure <0.5 ULP (in a 24 bit result) numerical error in its computations -- When setting the word length on the mac to 24 bits, and the sample rate to match the source, the mac just 0 pads the low order bits and sends the samples unchanged to the output. (this is no different than setting to 16 bit output when playing cd sourced material).
Where it gets interesting is where the source sample rate does not match the specified output sample rate. In this case the mac converts the sample rates (using 32 bit floating point math in the CoreAudio library), converting, at the last stage, back to fixed point at the specified output precision. You want this final output precision to be as high as possible. (The 32 bit FP math sounds better, but has less numerical stability than the 28 bit fixed point math the SRC4392 uses. Why did apple do it this way then? The short answer is that getting these things right when using fixed point math is *hard* -- it's much easier to use floating point -- the resulting error in a 24 bit result is going to be 3 to 4 ulp -- ie 22 to 23 good bits) (ulp = units of least precision). So if you have to do sample rate conversion, it's best to leave it to the BDA-1 to handle that.
The BDA-1 is *always* converting sample rates -- even when upsampling is off on the BDA panel. Why? Jitter elimination involves reclocking and that involves continually estimating the input sample rate and converting to a sample rate generated from a known good internally generated clock. This is what the SRC-4392 is designed to do. When upsampling is off, it is set up to generate a sample rate at a known value most closely matching the estimated input rate chosen from the short list seen on the front panel of the BDA-1. When in this mode, the BDA-1 has the DAC chips running with a higher oversampling (depending on the sample rate the DACs are seeing -- at 192 khz, they oversample 32x, at 44khz, they oversample 128x (from memory -- before my morning coffee)).
Oversampling vs upsampling -- Upsampling is changing the sample rate by computing new samples -- this is what the SRC 4392 does. This reduces sampling noise, and makes it possible to use very gentle rolloff filters.
Oversampling is taking the *same* sample value, and pushing it through the dac many times. Hoping that the error/noise averages out over some 32 or 64 different tries. And it does
.
Both are useful, and the combination seen in the BDA-1 produces amazingly good results.
-- Ian.
