Dual output clock...

MauiMods · « **on:** 13 Apr 2006, 02:21 am »

Can one be had??

hagtech · « **Reply #1 on:** 13 Apr 2006, 06:23 am »

Not sure exactly what you need. The output buffer is quite robust and can certainly drive more than one input. The issue is decent termination. If the inputs are relatively close to each other (~1 inch), then it should work fine.

jh

MauiMods · « **Reply #2 on:** 13 Apr 2006, 06:54 am »

Thanks Jim for you reply....
Did you mean the Outputs or inputs? of the clock signal?

hagtech · « **Reply #3 on:** 13 Apr 2006, 06:43 pm »

I'm trying to say we have one clock output driving two inputs (assume logic type ICs). Not sure how this is best done. We could use the standard approach as outlined in the manual, and run a stub off to the second input. Or perhaps run a "Y" termination and balance the transmission line stubs. The latter would minimize reflections on the line, but slow down the edges of both inputs.

We're talking secondary effects here. Keep in mind it will work even if you connect with piano wire or steel wool. I'm just trying to tweak out the maximum RF performance of the lines.

jh