I hope that Nicholas will not mind me butting in on his circle, especially with all that is going on today, but I have a question for the person who made the following post.
It is generally accepted that clock jitter below 200ps rms is inaudible; although there are some who claim to hear as little as 2ps. Most S/PDIF receivers have <200ps jitter. So, the question is: Why would a DAC designer deliberately increase clock jitter by orders of magnitude, as is the case with asynchronous reclocking, and why doesn’t anybody hear it?
Why do people such as yourself throw around buzz words like this, without even specifying what the hell they are talking about?
Are you talking about word clock jitter? Bit clock jitter? The same amount of phase noise gives much different jitter numbers. On top of that, whether or not the jitter is data-correlated is also important. But you make no mention of that, just regurgitate the same ol' "jitter below a certain level is inaudible" assertion.
I agree with JohnR and Chair Guy that this sort of discussion belongs in the Lab section. Where people who know what they are talking about can 'splain it to you without making a muck of someone's Circle.
For the record, I do not know who Nicholas is, what his company is, what they make and whether or not it is any good. BS is just BS, and needs to be confronted wherever it pops up.
Please forgive my butting in, and let's hope this place is still here on Monday morning.
Pat
